The present invention relates to a semiconductor device and a manufacturing method therefor, and more particularly, to a charge coupled device which enables charge transfer and a manufacturing method therefor.
A charge coupled device (CCD), as a kind of charge transfer device, is a dynamic device which transfers charge via a predetermined path according to clock pulses applied to a gate electrode. The CCD is constituted of metal oxide semiconductor (MOS) transistors of which the gates are connected to one another in series.
The CCD having the characteristic of charge transfer via a predetermined path is widely used as an image device which is combined with a group of photo-diodes arranged in parallel to the CCD in order to sense an optical signal. The CCD also finds its use in various fields of analog and digital signal processing, using its ability of charge accumulation and transfer.
The first CCD suggested by Bell and Smith in 1969 includes an insulation layer and gate electrodes arranged to constitute a MOS capacitor on a semiconductor substrate. This simple planar arrangement of gate electrodes makes it difficult to control the shapes of a potential well under the gate electrodes. Therefore, a structure has been suggested in which a gate electrodes are isolated from one another while being partially overlapped with each other. The structure which has been most widely used is composed of a plurality of gate electrodes formed on a semiconductor substrate having insulation layers formed therebetween, and charge transfer areas formed under the gate electrodes.
Charge-coupled devices are divided into a pseudo 2-phase CCD, a 3-phase CCD, and a 4-phase CCD according to a driving method, and the structural configurations of the CCDs are modified in accordance with their driving methods. Especially, the pseudo 2-phase CCD uses simple driving pulses despite its low capacity of charge transfer as compared with other configurations, thus it is widely used as a horizontal charge transfer device of a CCD-type image device requiring high speed operation.
FIG. 1 is a sectional view of a conventional charge coupled device.
The conventional charge coupled device has first gate electrodes 16 spaced from one another by a predetermined distance, second gate electrodes 18 positioned between each first gate electrode 16, and potential areas 14 formed under the second gate electrodes 18. A first clock terminal .phi.1 is connected to a first gate electrode 16 and a second gate electrode 18 which form a unit transfer group, and a second clock terminal .phi.2 is connected to a first gate electrode 16 and a second gate electrode 18 which form another unit transfer group.
The potential areas 14 are formed by ion implantation using the first gate electrodes 16 as a mask, and thus are aligned with the first gate electrodes 16. In addition, the potential areas 14 form potential wells in a charge transferring direction.
Mutually opposite clock signals are applied to the first and second clock terminals .phi.1 and .phi.2.
In FIG. 1, reference numeral 10 denotes a semiconductor substrate, reference numeral 12 denotes a buried channel for a buried CCD, and reference numeral 20 denotes an interlayer insulation layer.
FIG. 2 is a potential distribution diagram explaining the migration of charge of the charge coupled device of FIG. 1.
Charge stored in a potential well in the left side of FIG. 2 migrates to the right when a clock pulse is applied to the first and second clock terminals .phi.1 and .phi.2. In FIG. 2, an arrow indicates the direction of charge transfer.
The aforementioned pseudo 2-phase CCD of FIG. 1 has limits in reducing the length of charge transfer groups due to the application of a single clock pulse to two gate electrodes. That is, a reduction in the length of a unit gate electrode is limited due to resolution limitation during photolithography.
When as many transfer groups as possible are needed in an area of a given unit length as in a horizontal charge coupled device of a CCD-type image device, the above limits emerge as a serious problem. To avoid this problem, a method has been suggested in which a single gate electrode is used as a unit transfer group by forming a potential area below only half the area of each gate electrode, as shown in FIG. 3.
FIG. 3 is a sectional view for explaining another conventional charge coupled device.
The charge coupled device of FIG. 3 is the same as that of FIG. 2 in terms of the arrangement of the first and second gate electrodes 16 and 18. However, a potential area 15 is formed under each of the first and second gate electrodes 16 and 18. Furthermore, a single gate electrode is connected to each of the clock terminals .phi.1 and .phi.2.
Therefore, according to the charge coupled device of FIG. 3, the size of the area reserved for the charge coupled device can be reduced by at least half of the area of the charge coupled device of FIG. 1. That is, assuming that the sizes of horizontal charge transfer devices of a CCD-type image device are the same, the case of FIG. 3 can secure twice as many transfer groups as compared with the case of FIG. 1.
Meanwhile, in the case of the charge coupled device of FIG. 3, in order to form the potential area 15, ion implantation should be performed after an ion implantation mask is formed using photolithography. In this case, it is impossible to align each potential area 15 with each of the gate electrodes 16 and 18. Thus, there is a likelihood that an unnecessary local potential barrier or well is formed due to the misalignment of a potential area and a gate electrode at a gate electrode boundary, thereby lowering charge transfer efficiency.